Genesis Microchip Inc.
165 Commerce Valley Dr. West
Thornhill ON Canada L3T 7V8 Tel: (905) 889-5400 Fax: (905) 889-5422
2150 Gold Street
PO Box 2150 Alviso CA USA 95002 Tel: (408) 262-6599 Fax: (408) 262-6365
4F, No. 24, Ln 123, Sec 6, Min-Chung E. Rd.
Taipei Taiwan Tel: (2) 2791-0118 Fax: (2) 2791-0196
143-37 Hyundai Tower
Unit 902 Samsung-dong Kangnam-gu Seoul Korea 135-090 Tel: (82-2) 553-5693 Fax: (82-2) 552-4942
www.genesis-microchip.com / info@genesis-microchip.com
.com
Genesis Microchip Publication
PRELIMINARY DATA SHEET
gmZAN3
XGA Analog Interface
LCD Monitor Controller
GENESIS MICROCHIP
CONFIDENTIAL
Publication Number: C0523-DAT-01G
Publication Date: July 2003
Copyright 2003 Genesis Microchip Inc. All Rights Reserved.
Genesis Microchip Inc. reserves the right to change or modify the information contained herein without notice. It is
the customer's responsibility to obtain the most recent revision of the document. Genesis Microchip Inc. makes no
warranty for the use of its products and bears no responsibility for any errors or omissions that may appear in this
document.
The following are trademarks or registered trademarks of Genesis Microchip, Inc.:
Genesis
TM
, Genesis Display Perfection
TM
, ESM
TM
, RealColor
TM
, Ultra-Reliable DVI
TM
, Real Recovery
TM
, Sage
TM
, JagASM
TM
,
SureSync
TM
, Adaptive Backlight ControlTM, Faroudja
TM
, DCDi
TM
, TrueLife
TM
, IntelliComb
TM
Other brand or product names are trademarks of their respective holders.
gmZAN3 Preliminary Data Sheet
C0523-DAT-01G 3
July
2003
G e n e s i s M i c r o c h i p C o n f i d e n t i a l
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Table Of Contents
1
Overview ........................................................................................................................................8
1.1
gmZAN3 System Design Examples ......................................................................................8
1.2
gmZAN3 Features .................................................................................................................9
2
gmZAN3 Pinout ...........................................................................................................................10
3
gmZAN3 Pin List .........................................................................................................................12
4
Functional Description .................................................................................................................19
4.1
Clock Generation.................................................................................................................19
4.1.1
Using the Internal Oscillator with External Crystal ........................................................19
4.1.2
Using an External Clock Oscillator.................................................................................22
4.1.3
Clock Synthesis ...............................................................................................................23
4.2
Hardware Reset ...................................................................................................................24
4.3
Analog to Digital Converter ................................................................................................26
4.3.1
ADC Pin Connection.......................................................................................................26
4.3.2
ADC Characteristics........................................................................................................28
4.3.3
Clock Recovery Circuit...................................................................................................28
4.3.4
Sampling Phase Adjustment............................................................................................29
4.3.5
Integrated Schmitt Trigger for Horizontal and Vertical Sync input................................29
4.3.6
SOG and CSYNC support...............................................................................................30
4.3.7
ADC Capture Window ....................................................................................................31
4.4
Test Pattern Generator (TPG)..............................................................................................32
4.5
Input Format Measurement .................................................................................................33
4.5.1
Horizontal and Vertical Measurement ............................................................................33
4.5.2
Format Change Detection................................................................................................33
4.5.3
Watchdog ........................................................................................................................34
4.5.4
Internal Odd/Even Field Detection (For Interlaced Inputs to ADC Only) ......................34
4.5.5
Input Pixel Measurement ................................................................................................34
4.5.6
Image Phase Measurement..............................................................................................34
4.5.7
Image Boundary Detection..............................................................................................34
4.5.8
Image Auto Balance ........................................................................................................34
4.6
High-Quality Scaling...........................................................................................................35
4.6.1
Variable Zoom Scaling....................................................................................................35
4.6.2
Horizontal & Vertical Shrink ..........................................................................................35
4.7
Gamma LUT........................................................................................................................35
4.8
Display Output Interface .....................................................................................................35
4.8.1
Display Synchronization .................................................................................................35
gmZAN3 Preliminary Data Sheet
C0523-DAT-01G 4
July
2003
G e n e s i s M i c r o c h i p C o n f i d e n t i a l
h t t p : / / w w w . g e n e s i s - m i c r o c h i p . c o m
4.8.2
Programming the Display Timing...................................................................................36
4.8.3
Panel Power Sequencing (PPWR, PBIAS) .....................................................................37
4.8.4
Output Dithering .............................................................................................................38
4.9
Four Channel LVDS Transmitter (for gmZAN3L Only) ....................................................38
4.10
Flexible TTL Outputs (gmZAN3T Only)............................................................................39
4.11
Energy Spectrum Management (ESM)................................................................................39
4.12
OSD .....................................................................................................................................39
4.12.1
On-Chip OSD SRAM .................................................................................................40
4.12.2
Color Look-up Table (LUT) .......................................................................................41
4.13
General Purpose Inputs and Outputs (GPIO's) ...................................................................41
4.14
Bootstrap Configuration Pins ..............................................................................................41
4.15
Host Interface ......................................................................................................................41
4.15.1
Host Interface Command Format for 2 or 6-wire ....................................................42
4.15.2
2-wire Serial Protocol .................................................................................................42
4.15.3
8-bit Parallel Interface ................................................................................................44
4.16
Miscellaneous Functions .....................................................................................................45
4.16.1
Low Power State.........................................................................................................45
4.16.2
Pulse Width Modulation (PWM) Back Light Control ................................................45
5
Electrical Specifications ...............................................................................................................46
5.1
Preliminary DC Characteristics...........................................................................................46
5.2
Preliminary AC Characteristics...........................................................................................49
6
Ordering Information ...................................................................................................................52
7
Mechanical Specifications............................................................................................................53
gmZAN3 Preliminary Data Sheet
C0523-DAT-01G 5
July
2003
G e n e s i s M i c r o c h i p C o n f i d e n t i a l
h t t p : / / w w w . g e n e s i s - m i c r o c h i p . c o m
List Of Tables
Table 1.
Analog Input Port (Common to gmZAN3T and gmZAN3L) .............................................12
Table 2.
Clock Pins (Common to gmZAN3T and gmZAN3L).........................................................12
Table 3.
System Interface and GPIO Signals (gmZAN3T)...............................................................13
Table 4.
System Interface and GPIO Signals (gmZAN3L)...............................................................14
Table 5.
Display Output Port for (gmZAN3L)..................................................................................15
Table 6.
Display Output Port for (gmZAN3T)..................................................................................16
Table 7.
Reserved Pins for gmZAN3L..............................................................................................17
Table 8.
Reserve Pins for gmZAN3T................................................................................................17
Table 9.
I/O Power and Ground Pins for gmZAN3L ........................................................................17
Table 10.
Power and Ground Pins for LVDS Transmitter for gmZAN3L......................................18
Table 11.
I/O Power and Ground pins for gmZAN3T ....................................................................18
Table 12.
TCLK Specification ........................................................................................................22
Table 13.
Temperature and Voltage variations for T
RESETn
..........................................................26
Table 14.
Pin Connection for RGB Input with HSYNC/VSYNC...................................................26
Table 15.
ADC Characteristics........................................................................................................28
Table 16.
Temperature and Voltage Variation for Schmitt Trigger ................................................30
Table 17.
Supported LVDS 24-bit Panel Data Mappings ...............................................................39
Table 18.
Supported LVDS 18-bit Panel Data Mapping.................................................................39
Table 19.
Bootstrap Signals.............................................................................................................41
Table 20.
Instruction Byte Map.......................................................................................................42
Table 21.
Absolute Maximum Ratings............................................................................................46
Table 22.
gmZAN3L DC Characteristics........................................................................................47
Table 23.
gmZAN3T DC Characteristics........................................................................................48
Table 24.
Maximum Speed of Operation ........................................................................................49
Table 25.
Display Timing and DCLK Adjustments........................................................................49
Table 26.
2-Wire Host Interface Port Timing .................................................................................49
Table 27.
Microcontroller Interface Timing (Muxed Address/Data) for Register Read/Write.......50
Table 28.
Microcontroller Interface Timing (Muxed Address/Data) for OSD Memory Read/Write51
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